Survivor sequence memory management in Viterbi decoders
- 1 January 1991
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 2967-2970 vol.5
- https://doi.org/10.1109/iscas.1991.176168
Abstract
This work extends previous trace-back approaches. A new one-pointer trace-back algorithm for survivor sequence memory management that is particularly well-suited to a VLSI implementation is described. Memory size, latency and implementational complexity of the survivor sequence management are analyzed for both uniprocessor and multiprocessor realizations of Viterbi decoders.Keywords
This publication has 6 references indexed in Scilit:
- Stanford Telecom VLSI design of a convolutional decoderPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Truncation effects in Viterbi decodingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Generalized trace back techniques for survivor memory management in the Viterbi algorithmPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Survivor sequence memory management in Viterbi decodersPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1991
- Memory Management in a Viterbi DecoderIEEE Transactions on Communications, 1981
- Error-Correction Coding for Digital CommunicationsPublished by Springer Nature ,1981