Invited paper Parallel binary byte adder/subtracter

Publisher Website
Google Scholar
Abstract
Recursive boolean equations are presented that can be used for hardware implementations of adders that include binary byte addition and subtraction. Normally adders of this type are used by microcode and sometimes are required by architected instruction sets. The new proposed sum equations do not depend on the carries or equivalent quantities. The advantages associated with adders designed with the new carries that are not equivalent or equal to the traditional carries, have been retained.

This publication has 2 references indexed in Scilit: