A three-level wiring capacitance analysis for VLSIs using a three-dimensional simulator

Publisher Website

6 January 2003

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/iedm.1988.32826

Abstract

No abstract available

Keywords

This publication has 3 references indexed in Scilit:

Process-Based Three-Dimensional Capacitance Simulation -- TRICEPS
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1986
VLSI wiring capacitance
IBM Journal of Research and Development, 1985
Coupling capacitances for two-dimensional wires
IEEE Electron Device Letters, 1981