2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis

This publication has 4 references indexed in Scilit:

• Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm
  Published by Springer Nature ,2001
• An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalists
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2001
• Report on the development of the Advanced Encryption Standard (AES)
  Journal of Research of the National Institute of Standards and Technology, 2001
• Recommendation for block cipher modes of operation :
  Published by National Institute of Standards and Technology (NIST) ,2001