A wafer-scale FFT processor featuring a repeatable building block
- 7 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- A wafer-scale 170000-gate FFT processor with built-in test circuitsIEEE Journal of Solid-State Circuits, 1988
- A wafer-scale digital integrator using restructurable VSLIIEEE Transactions on Electron Devices, 1985
- Wafer-scale integration-a fault-tolerant procedureIEEE Journal of Solid-State Circuits, 1978