Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple DES Using SLAAC-1V FPGA Accelerator Board
- 11 September 2001
- book chapter
- Published by Springer Nature
- p. 220-234
- https://doi.org/10.1007/3-540-45439-x_15
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
- Implementing an API for distributed adaptive computing systemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Two Methods of Rijndael Implementation in Reconfigurable HardwarePublished by Springer Nature ,2001
- Fast Implementation and Fair Comparison of the Final Candidates for Advanced Encryption Standard Using Field Programmable Gate ArraysPublished by Springer Nature ,2001
- Fast implementations of secret-key block ciphers using mixed inner- and outer-round pipeliningPublished by Association for Computing Machinery (ACM) ,2001
- A Comparative Study of Performance of AES Final Candidates Using FPGAsPublished by Springer Nature ,2000