Comments on “some considerations in the formulation of IC yield statistics”
- 1 February 1981
- journal article
- Published by Elsevier in Solid-State Electronics
- Vol. 24 (2) , 127-132
- https://doi.org/10.1016/0038-1101(81)90006-x
Abstract
No abstract availableKeywords
This publication has 7 references indexed in Scilit:
- Yield Model for Productivity Optimization of VLSI Memory Chips with Redundancy and Partially Good ProductIBM Journal of Research and Development, 1980
- Some considerations in the formulation of IC yield statisticsSolid-State Electronics, 1979
- The IC yield problem: A tentative analysis for MOS/SOS circuitsIEEE Transactions on Electron Devices, 1978
- LSI Yield Modeling and Process MonitoringIBM Journal of Research and Development, 1976
- On a composite model to the IC yield problemIEEE Journal of Solid-State Circuits, 1975
- Defect analysis and yield degradation of integrated circuitsIEEE Journal of Solid-State Circuits, 1974
- Applying a composite model to the IC yield problemIEEE Journal of Solid-State Circuits, 1974