CMOS inter-chip interconnection circuit using high-T/sub c/ superconducting tunnel junctions and interconnections

1 August 1989

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters

Vol. 10 (8) , 373-376
https://doi.org/10.1109/55.31761

Abstract

The analysis of a possible low-voltage CMOS interconnection circuit utilizing high-T/sub c/ superconducting tunnel junctions (TJs) and interconnections for very-high-speed interchip communication at low temperatures (4-77 K) is presented. The circuit uses tunnel junctions as diodes to clip voltage swings between well-controlled levels defined by the energy gaps of the high-T/sub c/ materials. The circuit dissipates five to eight times less power than conventional designs, produces very small current transients, and has good immunity to noise from input voltage fluctuations, crosstalk, and simultaneous switching of drivers.

Keywords

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