Multifrequency zero-jitter delay-locked loop
- 1 January 1994
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 29 (1) , 67-70
- https://doi.org/10.1109/4.272097
Abstract
No abstract availableThis publication has 3 references indexed in Scilit:
- The 68040 32-b monolithic processorIEEE Journal of Solid-State Circuits, 1990
- A variable delay line PLL for CPU-coprocessor synchronizationIEEE Journal of Solid-State Circuits, 1988
- A survey of digital phase-locked loopsProceedings of the IEEE, 1981