Signal Delay in RC Tree Networks
- 1 July 1983
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 2 (3) , 202-211
- https://doi.org/10.1109/tcad.1983.1270037
Abstract
In MOS integrated circuits, signals may propagate between stages with fanout. The exact calculation of signal delay through such networks is difficult. However, upper and lower bounds for delay that are computationally simple are presented in this paper. The results can be used 1) to bound the delay, given the signal threshold, or 2) to bound the signal voltage, given a delay time, or 3) certify that a circuit is "fast enough," given both the maximum delay and the voltage threshold.Keywords
This publication has 10 references indexed in Scilit:
- TV: An nMOS Timing AnalyzerPublished by Springer Nature ,1983
- Auto-Delay: A Program for Automatic Calculation of Delay in LSI/VLSI ChipsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982
- Signal Delay in RC Tree NetworksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- The Analog Behavior of Digital Integrated CircuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- A bibliography of distributed-RC networksIEEE Circuits & Systems Magazine, 1980
- Approximation of nonuniform RC-distributed networks for frequency- and time-domain computationsIEEE Transactions on Circuit Theory, 1972
- Description of electrical networks using wiring operatorsProceedings of the IEEE, 1972
- Theory of Nonuniform RC Lines, Part I: Analytic Properties and Realizability Conditions in the Frequency DomainIEEE Transactions on Circuit Theory, 1967
- Theory of Nonuniform RC Lines, Part II: Analytic Properties in the Time DomainIEEE Transactions on Circuit Theory, 1967
- The Transient Response of Damped Linear Networks with Particular Regard to Wideband AmplifiersJournal of Applied Physics, 1948