PODEM-X: An Automatic Test Generation System for VLSI Logic Structures

1 January 1981

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 260-268
https://doi.org/10.1109/dac.1981.1585361

Abstract

Multiple test generation algorithms and techniques described in this paper have been integrated into a unified system which has successfully produced tests for unpartitioned LSSD logic structures of up to 50,000 logic gates. The design concepts behind the creation of a unified system are presented, as are actual results obtained on large logic structures. System usability was significantly enhanced by the same concepts that facilitated the integration of multiple algorithms and techniques.

Keywords

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