Design Criteria for a High-Dose MOS Dosimeter for Use in Space

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Abstract
In a previous paper a small, light-weight, low-power integrating dosimeter is described that is designed for use aboard satellites where the expected total dose is below 30 krad. The radiation-detecting sensors employed are radiation-soft, PMOS transistors. The dosimetric parameter utilized is the shift in threshold voltage, Δ VT. This voltage shift is related to the radiation dose absorbed, D, in the SiO2 gate oxide of the transistor. The relationship between Δ VT and D is determined with a calibrated Co-60 gamma-ray source. The present paper gives experimental results from which design criteria are derived that will extend the use of the dosimeter into the megarad range. The data show that the existing PMOS transistors can be operated in either of two ways. With a high positive gate bias during irradiation, and with some circuit modification, the PMOS transistors are useful up to about 50 krad. When the source, drain, and gate are grounded during irradiation, and subsequently read out normally, the devices are usable up to approximately 2.5 Mrad. The underlying device physics for these two modes of operation is discussed.

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