Low-power architectural synthesis and the impact of exploiting locality
- 1 August 1996
- journal article
- Published by Springer Nature in Journal of Signal Processing Systems
- Vol. 13 (2-3) , 239-258
- https://doi.org/10.1007/bf01130408
Abstract
No abstract availableKeywords
This publication has 33 references indexed in Scilit:
- Scheduling Algorithms For Hierarchical Data Control Flow GraphsInternational Journal of Circuit Theory and Applications, 1992
- New spectral methods for ratio cut partitioning and clusteringIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1992
- Ratio cut partitioning for hierarchical designsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1991
- Architectural partitioning for system level synthesis of integrated circuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1991
- Partitioning of unstructured problems for parallel processingComputing Systems in Engineering, 1991
- Incorporating bottom-up design into hardware synthesisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1990
- Partitioning logic on graph structures to minimize routing costIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1990
- Force-directed scheduling for the behavioral synthesis of ASICsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989
- Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuitsIEEE Journal of Solid-State Circuits, 1984
- Optimization by Simulated AnnealingScience, 1983