Fault-tolerant approaches based on evolvable hardware and using a reconfigurable electronic devices

Abstract
The paper presents and compares two approaches to design fault-tolerant evolvable hardware: one based on the fitness definition and the other based on the population statistics. The fitness approach defines, in an explicit way, the faults that the component may encounter during its life time and evaluates the average behavior of the individuals. The population approach uses the implicit information of the population statistics accumulated by the genetic algorithm over many generations. The paper presents experiments done using both approaches on a fine-grained CMOS Field Programmable Transistor Array (FPTA) architecture for the synthesis of a fault-tolerant XNOR digital circuit. Experiments show that the evolutionary algorithm is able to find a fault-tolerant design for the XNOR function that can recover functionality when lost due to not a-priori known faults, by finding new circuits configurations that circumvent the faults. Our preliminary experiments show that the population approach designs a fault-tolerant circuit with a better performance and in less computation than the fitness based approach.

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