Microarchitecture of HaL's memory management unit
- 19 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
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- Architectural overview of HaL systemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Error detection and handling in a superscalar, speculative out-of-order execution processor systemPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Fault-tolerant features in the HaL memory management unitIEEE Transactions on Computers, 1995