A highly efficient residue-combinatorial architecture for digital filters
- 1 June 1978
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Proceedings of the IEEE
- Vol. 66 (6) , 700-702
- https://doi.org/10.1109/proc.1978.10994
Abstract
A hybrid digital filter structure is presented that combines a combinatorial multiplication technique with a residue number architecture. The hybrid technique eliminates general multiplication and results in a parallel structure inherent in the residue number system. Results indicate that better speed/cost ratios can be obtained with the hybrid architecture than with either structure alone for applications in which high performance is a predominant factor.Keywords
This publication has 4 references indexed in Scilit:
- A high-speed low-cost recursive digital filter using residue number arithmeticProceedings of the IEEE, 1977
- The use of residue number systems in the design of finite impulse response digital filtersIEEE Transactions on Circuits and Systems, 1977
- On sign bit assignment for a vector multiplierProceedings of the IEEE, 1976
- A new hardware realization of digital filtersIEEE Transactions on Acoustics, Speech, and Signal Processing, 1974