Quadruply Self-Aligned MOS (QSA MOS) - A New Short-Channel High-Speed High-Density MOSFET for VLSI
- 1 August 1980
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 15 (4) , 417-423
- https://doi.org/10.1109/jssc.1980.1051415
Abstract
A new device named Quadruply Self-Aligned (QSA) MOS is proposed to overcome speed and density limits of conventional scaled-down MOS VLSI circuits. This device includes four mutually selfaligned areas: narrow poly-Si gate, shallow-source/drains to eliminate short-channel effects, deep junctions for highconductance, and specific contacts to afford efficient metal interconnection. To get these four regions to register, the gate pattern is first defined followed by undercutting of the polysilicon, anisotropic reactive ion etching of the gate oxide, and ion implantation into the source/drain regions. The device has been fabricated and its proper operation has been demonstrated. Because of its short-channel length and small gate-drain overlap capacitance, this device allows the design of high-speed VLSI circuits using high-conductive interconnects. Also, the self-aligned process allows the design of high-density VLSI circuits. It is shown that the design of the ultimate 3F X 2F cell (6 /spl mu/m/sup 2//cell, namely 3 X 2 mm/sup 2//1 Mbit in 1-/spl mu/m rule) and the 4F pitch sense amplifier in dynamic MOS RAM are feasible using this QSA technology. (F is the minimum feature size.)Keywords
This publication has 12 references indexed in Scilit:
- Etching characteristics of SiO2 in CHF3 gas plasmaJournal of Electronic Materials, 1980
- One-device cells for dynamic random-access memories: A tutorialPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- 1 /spl mu/m MOSFET VLSI technology. II. Device designs and characteristics for high-performance logic applicationsIEEE Journal of Solid-State Circuits, 1979
- 1 /spl mu/m MOSFET VLSI technology. I. An overviewIEEE Journal of Solid-State Circuits, 1979
- Profile control by reactive sputter etchingJournal of Vacuum Science and Technology, 1978
- A New Self‐Aligned Contact TechnologyJournal of the Electrochemical Society, 1978
- A new self-aligning contact process for MOS LSIPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1978
- Fabrication of a miniature 8K-bit memory chip using electron-beam exposureJournal of Vacuum Science and Technology, 1975
- A high-speed logic LSI using diffusion self-aligned enhancement depletion MOS ICIEEE Journal of Solid-State Circuits, 1975
- Design of ion-implanted MOSFET's with very small physical dimensionsIEEE Journal of Solid-State Circuits, 1974