Proposal of Trench-Oxide Metal-Oxide-Semiconductor Structure and Computer Simulation of Silicon Quantum-Wire Characteristics

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Abstract
We propose “trench-oxide metal-oxide-semiconductor (MOS)” structures as a novel formation method of silicon-based low-dimensional quantum structures, which are considered to be basic elements of future ultrahigh-speed and ultralarge-scale integrated devices. In this method, the applied gate voltage forms the potential well confined in an additional direction defined by ultrafine “trenches” on the oxide layer of the MOS structure. We characterize “trench-oxide MOS” quantum wire structures by two-dimensional numerical calculation of the shape of the potential well, the subband energy levels and the electron density, and investigate the possibility of the experimental observation of quantized density of states peculiar to quantum wires, by measuring capacitance-gate voltage (C-V) characteristics of “trench-oxide MOS capacitors.” We also have successfully fabricated “trench-oxide MOS” quantum wires with the width of 16 nm using electron beam (EB) lithography and electron cyclotron resonance reactive ion etching (ECR-RIE).