Very Low Power Gigabit Logic Circuits with Enhancement-Mode GaAs MESFETS
- 23 March 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 81 (0149645X) , 188-190
- https://doi.org/10.1109/mwsym.1981.1129864
Abstract
Ultra high-speed enhemcement-mode GaAs MESFET integrated circuits, 0.6 mu m in gate length, were fabricated using electron beam direct writing and employing recessed gate structure. The minimum delay time was 28.7 ps per gate with 2.3 mW power dissipation. At liquid nitrogen temperature, 77 K, the delay time was reduced to 17.5 ps with 9.2 mW power dissipation. A divide-by-eight counter was successfully demonstrated at 3.8 GHz with a power consumption of 23.6 mW per chip or 1.2 mW per gate.Keywords
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