A complete single-chip implementation of the JPEG image compression standard

9 December 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 12.2/1-12.2/4
https://doi.org/10.1109/cicc.1991.164081

Abstract

The authors present a still-picture compression chip which integrates the whole of the JPEG (Joint Photographic Experts Group) baseline standard, from image input to coded data stream output. The design has been implemented on a 1.2- mu m CMOS process with a die size of 10*9 mm. An onboard microcontroller handles the interpretation and assembly of the compressed data stream.<>

Keywords

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