SLS: An Advanced Symbolic Layout System for Bipolar and FET Design
- 1 October 1986
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 5 (4) , 450-458
- https://doi.org/10.1109/tcad.1986.1270216
Abstract
No abstract availableKeywords
This publication has 10 references indexed in Scilit:
- FLOSS: an approach to automated layout for high-volume designsPublished by Association for Computing Machinery (ACM) ,1988
- PSI: A symbolic layout systemIBM Journal of Research and Development, 1984
- Constraint solver for generalized IC layoutIBM Journal of Research and Development, 1984
- Custom Chip/Card Design SystemIBM Journal of Research and Development, 1984
- A Symbolic-Interconnect Router for Custom IC DesignPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984
- An algorithm for optimal two-dimensional compaction of VLSI layoutsIntegration, 1983
- Graph-Optimization Techniques for IC Layout and CompactionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983
- An Algorithm to Compact a VLSI Symbolic Layout with Mixed ConstraintsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983
- Virtual Grid Symbolic LayoutPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- Bristle Blocks: A Silicon CompilerPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979