Conflict-free access for streams in multimodule memories
- 1 May 1995
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. 44 (5) , 634-646
- https://doi.org/10.1109/12.381949
Abstract
Address transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access for streams with constant stride. However, this is achieved only for some strides. In this paper, we extend these schemes to achieve this conflict-free access for a larger number of strides. The basic idea is to perform an out-of-order access to a stream of fixed length. This stream is then stored in a local memory and used in subsequent instructions. This mode of operation is suitable for vector processors and for processors with decoupled access. The scheme and mode of operation proposed produce the largest possible number of conflict-free strides. Memory systems with any ratio between the number of memory modules and memory latency are considered. The hardware for address calculations and access control is described and shown to be of similar complexity as that required for access in orderPeer ReviewedPostprint (published versionKeywords
This publication has 11 references indexed in Scilit:
- Increasing the Number of Strides for Conflict-free Vector AccessPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- An Aperiodic Storage Scheme To Reduce Memory Conflicts In Vector ProcessorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Analysis Of Vector Access Performance On Skewed Interleaved MemoryPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Conflict-free vector access using a dynamic storage schemeIEEE Transactions on Computers, 1991
- Data prefetching in multiprocessor vector cache memoriesPublished by Association for Computing Machinery (ACM) ,1991
- Block, multistride vector, and FFT accesses in parallel memory systemsIEEE Transactions on Parallel and Distributed Systems, 1991
- Performance evaluation of vector accesses in parallel memories using a skewed storage schemeACM SIGARCH Computer Architecture News, 1986
- The Structure of Periodic Storage Schemes for Parallel MemoriesIEEE Transactions on Computers, 1985
- Access and Alignment of Data in an Array ProcessorIEEE Transactions on Computers, 1975
- The Organization and Use of Parallel MemoriesIEEE Transactions on Computers, 1971