Analysis and simulation of substrate coupling in integrated circuits

1 July 1995

journal article
Published by Wiley in International Journal of Circuit Theory and Applications

Vol. 23 (4) , 381-394
https://doi.org/10.1002/cta.4490230411

Abstract

A technique is presented which allows efficient calculation of substrate‐coupling macromodels in integrated circuits. the technique can be used to calculate node‐to‐node resistances or impedances in substrate models. Examples of the technique applied to several test structures are presented.

Keywords

INTEGRATED CIRCUIT

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