Floating-body effects in partially depleted SOI CMOS circuits
- 1 January 1997
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 32 (8) , 1241-1253
- https://doi.org/10.1109/4.604080
Abstract
No abstract availableThis publication has 9 references indexed in Scilit:
- SOI for a 1-volt CMOS technology and application to a 512 Kb SRAM with 3.5 ns access timePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Low-voltage transient bipolar effect induced by dynamic floating-body charging in PD/SOI MOSFETsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Manufacturing technology challenges for low power electronicsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- On the transient operation of partially depleted SOI NMOSFET'sIEEE Electron Device Letters, 1995
- Transient behavior of the kink effect in partially-depleted SOI MOSFET'sIEEE Electron Device Letters, 1995
- CMOS scaling in the 0.1-µm, 1.X-volt regime for high-performance applicationsIBM Journal of Research and Development, 1995
- A 1.5 ns 32 b CMOS ALU in double pass-transistor logicPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1993
- A 3.8-ns CMOS 16*16-b multiplier using complementary pass-transistor logicIEEE Journal of Solid-State Circuits, 1990
- Cascode voltage switch logic: A differential CMOS logic familyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984