An Integrated Design Automation System for VLSI Circuits
- 1 October 1985
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Design & Test of Computers
- Vol. 2 (5) , 17-26
- https://doi.org/10.1109/mdt.1985.294812
Abstract
Our Integrated Design Automation System consists of an integrated design database, automated design processors, verification tools, and an interactive capture system. The automatic logic synthesis program, Angel, and the hierarchical layout system Champ/Alpha, have been particularly important in reducing the total design effort. A unified design language, HSL-FX, has been developed to broaden LSI design system coverage and to obtain better results from automatic logic synthesis. Using this system, a 10K-gate CPU has been designed in two man-months¿from function-level description to layour pattern.Keywords
This publication has 3 references indexed in Scilit:
- CHAMP: Chip Floor Plan for Hierarchical VLSI Layout DesignIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1985
- CAD systems for VLSI in JapanProceedings of the IEEE, 1983
- Hierarchical Top-Down Layout Design Method for VLSI ChipPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982