0.1-μm GaAs MESFET's fabricated using ion-implantation and photolithography
- 30 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 185-188
- https://doi.org/10.1109/gaas.1993.394473
Abstract
A 0.1 /spl mu/m gate length self-aligned GaAs channel MESFET with a maximum current gain cutoff frequency (f/sub T/) of 113 GHz has been developed. This FET has a planar structure with a selective ion implanted channel layer and self-aligned n/sup +/-layers. The 0.1 /spl mu/m gate length is attained though conventional photolithography and ECR-etching. The tri-level resist technique and two step etching process are developed to attain 0.1 /spl mu/m gate. The demonstration that planar GaAs MESFETs can achieve an f/sub T/ greater than 110 GHz is significant from the view point of LSI fabrication.<>Keywords
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