Finite field inversion over the dual basis
- 1 March 1996
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Vol. 4 (1) , 134-137
- https://doi.org/10.1109/92.486087
Abstract
In this transaction brief we consider the design of dual basis inversion circuits for GF(2/sup m/). Two architectures are presented-one bit-serial and one bit-parallel-both of which are based on Fermat's theorem. Finite field inverters based on Fermat's theorem have previously been presented which operate over the normal basis and the polynomial basis. However there are two advantages to be gained by forcing inversion circuits to operate over the dual basis. First, these inversion circuits can be utilized in circuits using hardware efficient dual basis multipliers without any extra basis converters. And second, the inversion circuits themselves can take advantage of dual basis multipliers, thus reducing their own hardware levels. As both these approaches require squaring in a finite field to take place, a theorem is presented which allows circuits to be easily designed to carry out squaring over the dual basis.Keywords
This publication has 8 references indexed in Scilit:
- Improved algorithm for division over GF (2 m )Electronics Letters, 1993
- SIGMA: a VLSI systolic array implementation of a Galois field GF(2/sup m/) based multiplication and division algorithmIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1993
- Bit-serial systolic divider and multiplier for finite fields GF(2/sup m/)IEEE Transactions on Computers, 1992
- Efficient bit-serial multiplication and the discrete-time Wiener-Hopf equation over finite fieldsIEEE Transactions on Information Theory, 1989
- A comparison of VLSI architecture of finite field multipliers using dual, normal, or standard basesIEEE Transactions on Computers, 1988
- A Fast VLSI Multiplier for GF(2m)IEEE Journal on Selected Areas in Communications, 1986
- VLSI Architectures for Computing Multiplications and Inverses in GF(2m)IEEE Transactions on Computers, 1985
- Bit-serial Reed - Solomon encodersIEEE Transactions on Information Theory, 1982