Simplified peripheral circuits for a marginally testable 4K RAM
- 23 March 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- A 1-mil/SUP 2/ single-transistor memory cell in n silicon-gate technologyIEEE Journal of Solid-State Circuits, 1973
- Storage array and sense/refresh circuit for single-transistor memory cellsIEEE Journal of Solid-State Circuits, 1972