Area array packaging technologies for high-performance computer workstations and multiprocessors
- 23 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Flip-chip on FR-4 integrated circuit packagingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Solder ball connection reliability model and critical parameter optimizationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A case study of high pin count area array ceramic package crackPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002