The design of sigma-delta modulation analog-to-digital converters
- 1 January 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 23 (6) , 1298-1308
- https://doi.org/10.1109/4.90025
Abstract
No abstract availableThis publication has 23 references indexed in Scilit:
- Simulating and testing oversampled analog-to-digital convertersIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1988
- A 12-bit sigma-delta analog-to-digital converter with a 15-MHz clock rateIEEE Journal of Solid-State Circuits, 1986
- A Compatible CMOS-JFET Pulse Density Modulator for Interpolative High-Resolution A/D ConversionIEEE Journal of Solid-State Circuits, 1986
- A multistage delta-sigma modulator without double integration loopPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1986
- A 3-/spl mu/m CMOS Digital Codec with Programmable Echo Cancellation and Gain SettingIEEE Journal of Solid-State Circuits, 1985
- A CMOS pulse density modulator for high-resolution A/D convertersIEEE Journal of Solid-State Circuits, 1984
- A low-noise chopper-stabilized differential switched-capacitor filtering techniqueIEEE Journal of Solid-State Circuits, 1981
- The Structure of Quantization Noise from Sigma-Delta ModulationIEEE Transactions on Communications, 1981
- Single-chip per channel codec with filters utilizing Δ-Σ modulationIEEE Journal of Solid-State Circuits, 1981
- Using Triangularly Weighted Interpolation to Get 13-Bit PCM from a Sigma-Delta ModulatorIEEE Transactions on Communications, 1976