A 14 bit CMOS A/D converter based on dynamic current memories
- 9 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 24.2/1-24.2/4
- https://doi.org/10.1109/cicc.1991.164094
Abstract
Dynamic current memories allow the realization of accurate cyclic or pipeline A/D converters without requiring floating capacitors while being insensitive to linearity, hysteresis, and matching of components. A cyclic A/D converter based on this principle has been integrated in a 3- mu m CMOS technology and exhibits a 14-bit linearity. The authors present fundamental limits in terms of speed, accuracy, and noise of cyclic (pipeline) converters based on dynamic current memories. Limiting factors for the accuracy are mainly the charge injection in the gate storage capacitance, and the output conductance of the MOS current memory. Charge injection is minimized by using carefully designed compensation switches and by controlling some gate voltages. The effect of the output conductance is reduced by using a cascode transistor whose drain voltage is controlled by a current conveyor.Keywords
This publication has 7 references indexed in Scilit:
- Ratio-independent current mode algorithmic analog-to-digital convertersPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Analysis and improvements of accurate dynamic current mirrorsIEEE Journal of Solid-State Circuits, 1990
- CMOS pipelined A/D convertor using current dividerElectronics Letters, 1989
- Novel CMOS pipelined A/D convertor architecture using current mirrorsElectronics Letters, 1989
- Charge injection in analog MOS switchesIEEE Journal of Solid-State Circuits, 1987
- The current conveyor—A new circuit building blockProceedings of the IEEE, 1968
- An Unusual Electronic Analog-Digital Conversion MethodIRE Transactions on Instrumentation, 1956