Fast multi-layer critical area computation
- 30 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 15505774,p. 117-124
- https://doi.org/10.1109/dftvs.1993.595723
Abstract
Based on the corner-stitching data structure, a geometrical approach to compute the critical area of a layout is presented. The run time of the proposed approach is linear to the number of patterns in a layout. Multilayer effect is taken into account so that the critical area computed for each mask layer is more accurate. The experimental results show that the method is promising for layout sensitivity analysis, yield estimation and realistic fault analysis.Keywords
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