2B1Q transceiver for the ISDN subscriber loop
- 13 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 260-261
- https://doi.org/10.1109/isscc.1989.48281
Abstract
A transceiver chip set for the ISDN (integrated services digital network) digital subscriber loop using quaternary code (2B1Q) is described which features full-duplex transmission with 144-kb/s net bit rate using the hybrid-balancing principle together with digital adaptive echo cancellation. The two-chip set provides the physical interface between the network termination and the digital exchange according to the T1D1 layer 1 specification for the ISDN basic access interface. A serial multiplexed standard interface allows connection to circuits supporting the layer 2 protocol control at the exchange side of the standard S-bus at the NT. Chip characteristics are listed, and block diagrams are presented.> Author(s) Koch, R. Siemens AG, Munich, West Germany Niggebaum, R. ; Vogel, D.Keywords
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