BOLD: The Boulder Optimal Logic Design system
- 7 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The BOLD (Boulder-Optimal Logic Design) system is a set of software tools that optimally transform an arbitrary combinational logic description into a standard cell, gate array, or complex CMOS gate technology. The design philosophy and structure of BOLD are summarized, and the various software tools and algorithms that comprise the BOLD system are described. The input to BOLD is either a behavioral circuit description or a Logical Interchange Format (LIF) file. The output is a netlist consisting of gates from a user supplied library or a netlist of CMOS complex gates. The philosophy of BOLD is contrasted with that of other available synthesis programs (most notably MIS and YLE), and the output of each is compared on a small set of examples.Keywords
This publication has 17 references indexed in Scilit:
- Flamel: A High-Level Hardware CompilerIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- Graph-Based Algorithms for Boolean Function ManipulationIEEE Transactions on Computers, 1986
- Using bottom-up design techniques in the synthesis of digital hardware from abstract behavioral descriptionsPublished by Association for Computing Machinery (ACM) ,1986
- Global Flow Analysis in Automatic Logic DesignIEEE Transactions on Computers, 1986
- A Rule-Based System for Optimizing Combinational LogicIEEE Design & Test of Computers, 1985
- LSS: A system for production logic synthesisIBM Journal of Research and Development, 1984
- Optimizing Synchronous Circuitry by Retiming (Preliminary Version)Published by Springer Nature ,1983
- Boolean Comparison of Hardware and FlowchartsIBM Journal of Research and Development, 1982
- Logic Synthesis Through Local TransformationsIBM Journal of Research and Development, 1981
- The automatic synthesis of digital systemsProceedings of the IEEE, 1981