VLSI implementation of a 256*256 crossbar interconnection network
- 2 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 11 references indexed in Scilit:
- The ICAP parallel processor communications switchPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Trends in semiconductor packaging, a merchant house viewPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Micro carrier for LSI chip used in the Hitachi M-800 processor groupPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Packaging technology for IBM's latest mainframe computers (S/390/ES9000)Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Electronic packaging in the 1990s-a perspective from AmericaIEEE Transactions on Components, Hybrids, and Manufacturing Technology, 1991
- A fault-tolerant GaAs/CMOS interconnection network for scalable multiprocessorsIEEE Journal of Solid-State Circuits, 1991
- A 250-Mbit/s CMOS crosspoint switchIEEE Journal of Solid-State Circuits, 1989
- An ECL compatible full CMOS 210 Mbps crosspoint switchPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1989
- A 64x17 Non-blocking Crosspoint SwitchPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1988
- A 15-ns CMOS 64K RAMIEEE Journal of Solid-State Circuits, 1986