A unified circuit model for bipolar transistors including quasi-saturation effects

1 June 1985

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 32 (6) , 1103-1113
https://doi.org/10.1109/t-ed.1985.22081

Abstract

This paper describes a compact model for bipolar transistors which includes quasi-saturation effects. The assumptions used in the formulation of this model are clearly stated and justified, and a step by step derivation of the model equations is presented. These equations model both de and charge storage effects. Parameter extraction techniques are qualitatively described and the compact model is evaluated using detailed physical simulations of a high voltage bipolar transistor. In addition, simulations employing this model are compared with measurements and are found to be in excellent agreement.

Keywords

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