Carry-save arithmetic for high-speed digital signal processing
- 4 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 6 references indexed in Scilit:
- Wave digital filters using carry-save arithmeticPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- CMOS VLSI implementation of the 2D-DCT with linear processor arraysPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Programmable 2D linear filter for video applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1989
- A programmable VLSI architecture for computing multiplication and polynomial evaluation modulo a positive integerIEEE Journal of Solid-State Circuits, 1988
- A 2- mu m CMOS digital adaptive equalizer chip for QAM digital radio modemsIEEE Journal of Solid-State Circuits, 1988
- A Pipelined 330-MHz MultiplierIEEE Journal of Solid-State Circuits, 1986