ASIC design with OASIS
- 4 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 2580-2583
- https://doi.org/10.1109/iscas.1990.112536
Abstract
No abstract availableKeywords
This publication has 10 references indexed in Scilit:
- Automated synthesis for testabilityIEEE Transactions on Industrial Electronics, 1989
- A quadrisection-based combined place and route scheme for standard cellsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989
- Boundary scan with built-in self-testIEEE Design & Test of Computers, 1989
- Design Systems for VLSI CircuitsPublished by Springer Nature ,1987
- An expert-system paradigm for designPublished by Association for Computing Machinery (ACM) ,1986
- The TimberWolf placement and routing packageIEEE Journal of Solid-State Circuits, 1985
- The Silc™ Silicon Compiler: Language and FeaturesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1985
- Logic Minimization Algorithms for VLSI SynthesisPublished by Springer Nature ,1984
- MacPitts: An Approach to Silicon CompilationComputer, 1983
- Bristle Blocks: A Silicon CompilerPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979