Improving code density using compression techniques
Top Cited Papers
- 23 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 10724451,p. 194-203
- https://doi.org/10.1109/micro.1997.645810
Abstract
Proposes a method for compressing programs in embedded processors where the instruction memory size dominates the cost. A post-compilation analyzer examines a program and replaces common sequences of instructions with a single instruction codeword. A microprocessor executes the compressed instruction sequences by fetching codewords from the instruction memory, expanding them back to the original sequence of instructions in the decode stage, and issuing them to the execution stages. We apply our technique to the PowerPC, ARM and i386 instruction sets and achieve an average size reduction of 39%, 34% and 26%, respectively, for SPEC CINT95 programs.Keywords
This publication has 5 references indexed in Scilit:
- Executing Compressed Programs On An Embedded RISC ArchitecturePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Compression of embedded system programsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Studies of Windows NT performance using dynamic execution tracesPublished by Association for Computing Machinery (ACM) ,1996
- Code Generation and Optimization Techniques for Embedded Digital Signal ProcessorsPublished by Springer Nature ,1996
- Assembling code for machines with span-dependent instructionsCommunications of the ACM, 1978