A quad-band low power single chip direct conversion CMOS transceiver with ΣΔ-modulation loop for GSM

Publisher Website

20 July 2004

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 217-220
https://doi.org/10.1109/esscirc.2003.1257111

Abstract

No abstract available

This publication has 2 references indexed in Scilit:

A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation
IEEE Journal of Solid-State Circuits, 1997
A multiple modulator fractional divider
IEEE Transactions on Instrumentation and Measurement, 1991