A video DSP with a macroblock-level-pipeline and a SIMD type vector-pipeline architecture for MPEG2 codec
- 17 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
VDSP2 is a DSP for the MPEG2 algorithm which employs 0.5 /spl mu/m triple-layer-metal CMOS technology. By using this DSP, a real-time encoder and decoder specified in MPEG2 have been realized with two VDSP2s and a ME unit, and a VDSP2, respectively, at 80 MHz clock rate.<>Keywords
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