A MOS four-quadrant analog multiplier using the quarter-square technique
- 1 December 1987
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 22 (6) , 1064-1073
- https://doi.org/10.1109/jssc.1987.1052856
Abstract
No abstract availableKeywords
This publication has 8 references indexed in Scilit:
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- CMOS RF circuits for data communications applicationsIEEE Journal of Solid-State Circuits, 1986
- A 20-V four-quadrant CMOS analog multiplierIEEE Journal of Solid-State Circuits, 1985
- A four-quadrant NMOS analog multiplierIEEE Journal of Solid-State Circuits, 1982
- Integrated MOS four-quadrant analogue multiplier using switched-capacitor techniqueElectronics Letters, 1982
- Design considerations in single-channel MOS analog integrated circuits-a tutorialIEEE Journal of Solid-State Circuits, 1978
- A high-performance monolithic multiplier using active feedbackIEEE Journal of Solid-State Circuits, 1974
- A new wide-band amplifier techniqueIEEE Journal of Solid-State Circuits, 1968