An insulated gate bipolar transistor with a self-aligned DMOS structure
- 6 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 01631918,p. 813-816
- https://doi.org/10.1109/iedm.1988.32935
Abstract
The authors describe a high-performance insulated-gate bipolar transistor (IGBT) with a self-aligned double-diffused MOS (DMOS) structure (SADMOS). A phosphosilicate glass (PSG) sidewall is used to form the n/sup +/ layer and isolate the gate from the emitter electrode. The DMOS structure, including the 5- mu m gap between the polysilicon gates and the small p-layer region under the n/sup +/ layer, is thus fabricated with a completely self-aligned (SA) process. An SA DMOS IGBT with a breakdown voltage of 500 V had a forward voltage drop of 1.6 V at a forward current density of 1100 A/cm/sup 2/, a fall time of 0.2 mu s and dynamic latching current density of 100 A/cm/sup 2/. The forward voltage drop is reduced by 1/3 over that of an IGBT with a conventional DMOS structure.<>Keywords
This publication has 4 references indexed in Scilit:
- "Insulated gate bipolar transistor (IGBT) with a trench gate structure "Published by Institute of Electrical and Electronics Engineers (IEEE) ,1987
- Cell geometry effect on IGT latch-upIEEE Electron Device Letters, 1985
- The COMFET—A new high conductance MOS-gated deviceIEEE Electron Device Letters, 1983
- The insulated gate rectifier (IGR): A new power switching devicePublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982