Abstract
It is shown that the function of a stack filter can be realized in k-step recursive use of one binary processing circuit. The time-area complexity of the proposed filter is O(k) as compared with O(2k) for stack filters. The proposed digital realizations are simple and modular in structure, and suitable for VLSI implementation. Analog/digital (A/D) hybrid realizations have the advantage that there is no need for an A/D converter array when the original signals come from an integrated sensor array. An experimental digital rank-order filter with a window size of three and arbitrary number of input bits is designed and implemented in a 3-μm double-metal polysilicon gate CMOS process. The chip has been fabricated and measurement results are correct with a clock frequency of up to 110 MHz

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