Electrical Properties of SrBi2Ta2O9/Insulator/Si Structures with Various Insulators

Abstract
The electrical properties of metal/ferroelectric/insulator/semiconductor (MFIS) structures with various insulators were investigated. Layers of Si3N4/SiO2 (NO) formed by thermal oxidation and low pressure chemical vapor deposition (LPCVD) and Al2O3 layers deposited by atomic layer deposition (ALD) were used as inter-dielectric layers. SrBi2Ta2O9 (SBT) films used as ferroelectric layers were prepared by metal organic decomposition (MOD). The capacitance-voltage (CV) curves including the memory window were affected by varying the annealing temperature for SBT films. Memory windows for MFIS structures with NO inter-dielectrics in the range of 0.75–1.2 V were maintained up to annealing temperatures of 900°C. The width of the memory window in CV curves for MFISs using thin Al2O3 layers decreases with increasing annealing temperature. Therefore, the selection of a good insulator and parameter control are required for the use of MFIS-ferroelectric random access memories (FRAMs).