A 2-V amplitude-linear phase-locked loop

This publication has 11 references indexed in Scilit:

• A 20-V four-quadrant CMOS analog multiplier
  IEEE Journal of Solid-State Circuits, 1985
• The Design of High-Performance Analog Circuits on Digital CMOS Chips
  IEEE Journal of Solid-State Circuits, 1985
• A 1200 Bit/s QPSK full duplex modem
  IEEE Journal of Solid-State Circuits, 1984
• Switch-induced error voltage on a switched capacitor
  IEEE Journal of Solid-State Circuits, 1984
• Switched-capacitor FSK modulator and demodulator in CMOS technology
  IEEE Journal of Solid-State Circuits, 1984
• MOS operational amplifier design-a tutorial overview
  IEEE Journal of Solid-State Circuits, 1982
• A four-quadrant NMOS analog multiplier
  IEEE Journal of Solid-State Circuits, 1982
• Phase locking as a new approach for tuned integrated circuits
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1969
• Conductance of MOS transistors in saturation
  IEEE Transactions on Electron Devices, 1969
• Applications of a monolithic analog multiplier
  IEEE Journal of Solid-State Circuits, 1968