Lisp on a reduced-instruction-set processor: characterization and optimization
- 1 July 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Computer
- Vol. 21 (7) , 34-45
- https://doi.org/10.1109/2.67
Abstract
The factors that motivated the choice of a reduced-instruction-set computer (RISC) on which to implement Lisp are examined. Dynamic profiling measurements used to characterise Lisp are reported. The implementation of tags in Lisp and the cost of function calls are discussed. Interprocedural register allocation is examined. Execution results for various benchmarks are presented and discussed.Keywords
This publication has 11 references indexed in Scilit:
- Tags and type checking in LISP: hardware and software approachesACM SIGARCH Computer Architecture News, 1987
- Implementing and Optimizing Lisp for the CrayIEEE Software, 1987
- A 553K-transistor LISP processor chipPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1987
- Symbolics ArchitectureComputer, 1987
- Global register allocation at link timePublished by Association for Computing Machinery (ACM) ,1986
- ORBIT: an optimizing compiler for schemePublished by Association for Computing Machinery (ACM) ,1986
- LISP on a reduced-instruction-set-processorPublished by Association for Computing Machinery (ACM) ,1986
- Reduced instruction set computersCommunications of the ACM, 1985
- Current status of a portable LISP compilerPublished by Association for Computing Machinery (ACM) ,1982
- An optimizing compiler for lexically scoped LISPPublished by Association for Computing Machinery (ACM) ,1982