Quality Level and Fault Coverage for Multichip Modules

1 January 1983

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

No. 0738100X,p. 201-206
https://doi.org/10.1109/dac.1983.1585649

Abstract

A relationship between the quality level of a multichip module package and test coverage is established. A fault model for each stage of assembly of the package is assumed and the contribution of each of these stages to the quality level is assessed to produce the required relationship to test coverage achieved through test generation programs.

Keywords

MULTICHIP MODULES
AUTOMATIC TESTING
PACKAGING
ASSEMBLY
LOGIC TESTING
WAFER SCALE INTEGRATION
SEMICONDUCTOR DEVICE MODELING
VIRTUAL MANUFACTURING
FAULT DETECTION
WIRING

This publication has 3 references indexed in Scilit:

Defect Level as a Function of Fault Coverage
IEEE Transactions on Computers, 1981
LSI Product Quality and Fault Coverage
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1981
Fault Coverage in Digital Integrated Circuits
Bell System Technical Journal, 1978