On a Varistructured Array of Microprocessors

1 February 1977

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers

Vol. C-26 (2) , 125-138
https://doi.org/10.1109/tc.1977.5009291

Abstract

The varistructure architecture gives the user the opportunity to specify the height and width of his primary memory ``at run time.'' This architecture, first proposed in 1973, has now been simplified to make it schedulable, extended to allow SIMD vector-vector operations, and further extended to provide variable structure within a task. Memory is efficiently utilized in that memory bandwidth can be increased for array processing, yet memory space is not wasted during string processing. The fetch-execute cycle operation is analyzed herein, and some tentative results regarding input-output and data communication between processing entities are reported. On the basis of the simplicity of the fetch-execute cycle, there is hope that this architecture may well be the best way to build minicomputers and large computers using a cellular array of microprocessors.

Keywords

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