Packaged clock recovery integrated circuits for 40 Gbit/s optical communication links
- 24 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 129-132
- https://doi.org/10.1109/gaas.1996.567824
Abstract
Three packaged clock recovery integrated circuits: a differentiate/rectify circuit, a delay/multiply circuit, and a phase detector circuit, were implemented in an advanced AlGaAs-GaAs HBT process. The packaged ICs show performance adequate for clock recovery for optical communication links of up to at least 40 Gbit/s. With a 30 Gbit/s pseudo-random sequence input, a phase-locked loop incorporating these ICs readily acquired and maintained phase lock, demonstrating the excellent system performance of these components.Keywords
This publication has 8 references indexed in Scilit:
- Hybrid digital/microwave HBTs for <30 Gb/s optical communications circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A packaged broadband monolithic variable gain amplifier implemented in AlGaAs/GaAs HBT technologyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Packaged 30 Gbit/s data demultiplexing and clockextraction IC fabricated in a AlGaAs/GaAs HBT technologyElectronics Letters, 1996
- 40 Gbit/s AlGaAs/GaAs HBT 4:1 multiplexer ICElectronics Letters, 1995
- High-speed electronics for optical communicationsPublished by SPIE-Intl Soc Optical Eng ,1994
- Multi-Gb/s silicon bipolar clock recovery ICIEEE Journal on Selected Areas in Communications, 1991
- A self correcting clock recovery curcuitJournal of Lightwave Technology, 1985
- Performances of the Delay-Line Multiplier Circuit for Clock and Carrier Synchronization in Digital Satellite CommunicationsIEEE Journal on Selected Areas in Communications, 1983